Branch prediction
AssigneeBroadcom Corporation
InventorsSophie WILSON, Geoffrey BARRETT
Life of this patent
Estimating the term…
Abstract
A method and system for branch prediction are provided herein. The method includes executing a program, wherein the program comprising multiple procedures, and setting bits in a taken branch history register to indicate whether a branch is taken or not taken during execution of instructions in the program. The method further includes the steps of calling a procedure in the program and overwriting, responsive to calling the procedure, the contents of the taken branch history register to a start address for the procedure.
Claims24
A method, comprising:
- executing a program, the program comprising multiple procedures;
- setting bits in a taken branch history register to indicate whether a branch is taken or not taken during execution of instructions in the program;
- calling a procedure in the program;
- overwriting, responsive to calling the procedure, the contents of the taken branch history register to a start address for the procedure.
An apparatus, comprising:
- a taken branch history register configured to store bits that indicate whether a branch is taken during execution of instructions in program, wherein the program includes multiple procedures;
- and
- a preset block configured to overwrite contents of the taken branch history register to a start address for a procedure in response to calling the procedure.
A processor, comprising:
- an instruction cache;
- an instruction fetch unit coupled to the instruction cache and configured to receive an unspeculated branch instruction from the instruction cache, and always fetch instructions for a first branch path of the unspeculated branch instruction that takes more clock cycles to execute than a second branch path of the unspeculated branch instruction.
A method, comprising:
- executing a program, the program comprising an unspeculated branch instruction;
- and
- always fetching instructions for a first branch path of the unspeculated branch instruction that takes more clock cycles to execute than a second branch path of the unspeculated branch instruction.
Dependencies are inferred from the claim text.