Memory mirroring
AssigneeRambus Inc.
InventorsSteven WOO, David SECKER, Ravindranath KOLLIPARA
Life of this patent
Estimating the term…
Abstract
Memory system enabling memory mirroring in single write operations. The memory system includes a memory channel which can store duplicate copies of a data element into multiple locations in the memory channel. The multiple locations are disposed in different memory modules and have different propagation times with respect to a data signal transmitted from the memory controller. In a write operation, the relative timings of the chip select, command and address signals among the multiple locations are adjusted according to the data propagation delay. As a result, a data element can be written into the multiple locations responsive to a data signal transmitted from the memory controller in a single transmission event.
Claims20
A system comprising:
- a memory controller;
- and
- a memory channel coupled to said memory controller, said memory channel comprising:
- a communication channel coupled to said memory controller;
- a first dual-inline memory module (DIMM) coupled to said communication channel and having a first signal latency for signals sent from the memory controller to the first DIMM;
- and
- a second DIMM coupled to said communication channel and having a second signal latency for signals sent from the memory controller to the second DIMM,
- wherein said memory controller is configured to enable storage of a primary copy of data within said first DIMM and a secondary copy of the data within said second DIMM in a single write operation by transmitting:
- a copy of the data over the memory channel to the first DIMM and the second DIMM;
- a first clock signal to the first DIMM;
- and
- a second clock signal to the second DIMM, wherein the second clock signal is delayed with respect to the first clock signal based on the first and second signal latencies.
A system comprising:
- a memory controller;
- and
- a memory channel comprising:
- a communication channel coupled to said memory controller;
- and
- a plurality of memory modules comprising a first module and a second module, wherein said first module and said second module are coupled to said communication channel,
- wherein said memory controller is configured to:
- determine a propagation delay between said first module and said second module with respect to signals transmitted from said memory controller;
- send a data signal representing a data element in a single transmission to said first module and said second module via data buses of said communication channel;
- and
- send clock signals and control signals respectively to said first module and said second module, wherein said clock signals and said control signals are respectively timed based on said propagation delay, and
- wherein said first module and said second module each are configured to store said data element responsive to said data signal and said control signals.
A method of storing data by memory mirroring, said method comprising:
- receiving at said memory controller a write request for storing a data element;
- transmitting by said memory controller a data signal representing said data element in a single transmission to a primary memory device and a backup memory device;
- and
- transmitting by said memory controller a first control signal to said primary memory device at a first time, and transmitting a second control signal to said backup memory device at a second time that differs from said first time by a propagation delay between said prime and said backup memory devices, wherein said first and said second control signals are operable to enable said primary memory device and said backup memory device to store said data element respectively,
- wherein said data signal and said first and said second control signals enable storage of a copy of said data element to said primary memory device and a copy of said data element to said backup memory device.
Dependencies are inferred from the claim text.