III-V Photonic Integration on Silicon
AssigneeThe Regents of the University of California
InventorJohn E. Bowers
Life of this patent
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Abstract
Photonic integrated circuits on silicon are disclosed. By bonding a wafer of HI-V material as an active region to silicon and removing the substrate, the lasers, amplifiers, modulators, and other devices can be processed using standard photolithographic techniques on the silicon substrate. The coupling between the silicon waveguide and the III-V gain region allows for integration of low threshold lasers, tunable lasers, and other photonic integrated circuits with Complimentary Metal Oxide Semiconductor (CMOS) integrated circuits.
Claims21
1-20. (canceled)
An article comprising:
- (1) a semiconductor substrate comprising a first layer, the first layer comprising single-crystal silicon, the first layer including a first waveguide, a first cladding region, and a second cladding region, wherein the first waveguide is between the first cladding region and the second cladding region;
- (2) a compound semiconductor structure comprising a first compound semiconductor layer and at least one quantum well;
- and
- (3) a bonded interface that is characterized by a lattice mismatch, the first waveguide and the compound semiconductor structure being joined at the bonded interface;
- wherein the at least one quantum well and the first waveguide are evanescently coupled.
The article of claim wherein the compound semiconductor structure further includes a second compound semiconductor layer that comprises the at least one quantum well, and wherein the first compound semiconductor layer and the first waveguide are joined at the bonded interface.
An article comprising:
- (1) a first silicon layer resident on a substrate, the first silicon layer comprising single-crystal-silicon, and the first silicon layer comprising a first waveguide;
- (2) a compound semiconductor structure comprising a first compound first compound semiconductor layer and a second compound semiconductor layer that includes at least one quantum well;
- and
- (3) a bonded interface that is characterized by a lattice mismatch, the first compound semiconductor layer and the first silicon layer being joined at the bonded interface;
- wherein the at least one quantum well and the first waveguide are evanescently coupled.
A method comprising:
- providing a first silicon layer resident on a first substrate, the first silicon layer comprising single-crystal silicon, and the first silicon layer including a first waveguide;
- providing a compound semiconductor structure comprising a first compound semiconductor layer and at least one quantum well, the compound semiconductor structure being disposed on a second substrate;
- joining the compound semiconductor structure and the first silicon layer at a first bonded interface characterized by a lattice mismatch;
- and
- removing the second substrate.
Dependencies are inferred from the claim text.