US 2015/0279442 A1 · SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY SYSTEM INCLUDING THE SAME

Abstract

A semiconductor memory device includes a plurality of normal word lines and a plurality of redundancy word lines which are disposed adjacent to the normal word lines, a detection block suitable for detecting a first word line whose active history satisfies a predetermined condition and a second word line adjacent to the first word line as a target word line and a target neighboring word line, among the normal word lines and the redundancy word lines, and a control block suitable for sequentially refreshing the normal word lines and the redundancy word lines whenever a refresh command is applied, and additionally refreshing the target word line, the target neighboring word line and a normal word line adjacent to the redundancy word lines among the normal word lines.

Claims19

Dependent claims

A semiconductor memory device, comprising:

a plurality of normal word lines and a plurality of redundancy word lines which are disposed adjacent to the normal word lines;
a detection block suitable for detecting a first word line whose active history satisfies a predetermined condition and a second word line adjacent to the first word line as a target word line and a target neighboring word line, among the normal word lines and the redundancy word lines;
and
a control block suitable for sequentially refreshing the normal word lines and the redundancy word lines whenever a refresh command is applied, and additionally refreshing the target word line, the target neighboring word line and a normal word line adjacent to the redundancy word lines among the normal word lines.

1 more element

A semiconductor system, comprising:

a semiconductor memory device including a plurality of normal word lines and a plurality of redundancy word lines which are disposed adjacent to the normal word lines, and suitable for sequentially refreshing the normal v cord lines and the redundancy word lines whenever a refresh command is applied, and additionally refreshing a target word line, a target neighboring word line adjacent to the target word line and a normal word line adjacent to the redundancy word lines among the normal word lines and the redundancy word lines;
and
a semiconductor controller suitable for detecting a word line whose active history satisfies a predetermined condition among the normal word lines and the redundancy word lines as the target word line, and transmitting a detection result to the semiconductor memory device.

Dependencies are inferred from the claim text.

Semiconductor memory device and semiconductor memory system including the same

Life of this patent

Semiconductor memory device and semiconductor memory system including the same

Life of this patent

Abstract

Claims19