Serial advanced technology attachment interfaces and methods for power management thereof

A serial advanced technology attachment (SATA) interface circuit comprising:

• a receiver configured to be connected to first differential signal lines and receive at least one of a first sleep request and a wake request from an external device through the first differential signal lines;
• a transmitter configured to be connected to second differential signal lines and transmit a sleep response to the external device through the second differential signal lines in response to the first sleep request;
• and
• at least one power segment configured to be connected to a sleep signal line and receive a second sleep signal from the external device through the sleep signal line,
• wherein the SATA interface circuit is configured to enter a first sleep mode in response to the first sleep request and a second sleep mode in response to the second sleep signal,
• wherein the SATA interface circuit is configured to exit the second sleep mode in response to negation of the second sleep signal and enter an active mode in response to the wake request,
• wherein the transmitter is further configured to transmit a wake response to the external device through the second differential signal lines in response to the wake request,
• wherein the SATA interface circuit is configured to consume less power in the second sleep mode than the first sleep mode,
• wherein a time period to enter the active mode from the second sleep mode is greater than a time period to enter the active mode from the first sleep mode.

A method of managing a power of a Serial Advanced Technology Attachment (SATA) interface circuit, the SATA interface circuit being configured to be connected to first differential signal lines, second differential signal lines and a sleep signal line separated from the first and second differential signal lines, the method comprising:

• receiving a first sleep request through the first differential signal lines;
• entering a first sleep mode in response to the first sleep request;
• transmitting a sleep response through the second differential signal lines upon entering the first sleep mode;
• entering a second sleep mode in response to a second sleep signal received through the sleep signal line;
• exiting the second sleep mode in response to negation of the second sleep signal;
• entering an active mode in response to a wake request through the first differential signal lines;
• and
• transmitting a wake response through the second differential signal lines upon entering the active mode,
• wherein the SATA interface circuit is configured to consume less power in the second sleep mode than the first sleep mode,
• wherein a time period to enter the active mode from the second sleep mode is greater than a time period to enter the active mode from the first sleep mode.

A storage device comprising:

• a nonvolatile memory;
• and
• a memory controller configured to control the nonvolatile memory, the memory controller including an interface circuit configured to communicate with an external device,
• wherein the interface circuit comprises:
• a receiver configured to be connected to first differential signal lines and receive a first sleep request from the external device through the first differential signal lines;
• a transmitter configured to be connected to second differential signal lines and transmit a sleep response to the external device through the second differential signal lines in response to the first sleep request;
• and
• at least one power segment configured to be connected to a sleep signal line and receive a second sleep signal from the external device through the sleep signal line,
• wherein the interface circuit is configured to enter a first sleep mode in response to the first sleep request and a second sleep mode in response to the second sleep signal,
• wherein the interface circuit is configured to exit the second sleep mode in response to negation of the second sleep signal,
• wherein the interface circuit is configured to consume less power in the second sleep mode than the first sleep mode,

A method of managing a power of a storage device including a nonvolatile memory and a memory controller, the memory controller including an interface circuit being configured to be connected to first differential signal lines, second differential signal lines and a sleep signal line, the method comprising:

• receiving a first sleep request through the first differential signal lines;
• entering a first sleep mode of the interface circuit in response to the first sleep request;
• transmitting a sleep response through the second differential signal lines upon entering the first sleep mode;
• and
• entering a second sleep mode of the interface circuit in response to a second sleep signal received through the sleep signal line;
• exiting the second sleep mode of the interface circuit in response to negation of the second sleep signal.