# US 2015/0145708 A1 · Converting circuit and communication device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2015/0145708 A1 - Document ID: US20150145708A1 - Status: Published application - Kind: A1 - Application number: 14/462,961 - Filed: 2014-08-19 - Published: 2015-05-28 - Earliest claimed: 2013-11-27 - Assignees: Spreadtrum Communications (Shanghai) Co., Ltd. - Applicants: Spreadtrum Communications (Shanghai) Co., Ltd. - Inventors: Jiangang WU; Haifeng SHEN; Jiaqing WANG - Web page: https://patentgrep.com/patent/US20150145708A1 ## CPC - H03M 1/462: {Details of the control circuitry, e.g. of the successive approximation register} - H03M 1/02: Reversible analogue/digital converters - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract A converting circuit and a communication device are provided. The converting circuit includes: a sample hold circuit for receiving an analog signal; a Digital to Analog Converter (DAC); a comparator being connected with an output end of the sample hold circuit and an output end of the DAC; and a control circuit being connected with an output end of the comparator, wherein when the sample hold circuit receives an analog signal, the control circuit controls the sample hold circuit and the comparator to work, controls an output of the DAC based on an output of the comparator, and outputs a corresponding digital signal; and when the control circuit detects a digital signal is input, the control circuit controls the DAC to convert the digital signal into an corresponding analog signal and output the corresponding analog signal. The converting circuit can reduce chip area and chip cost. ## Claims ### Claim 1 A converting circuit, comprising: a sample hold circuit for receiving an analog signal; a Digital to Analog Converter (DAC); a comparator being connected with an output end of the sample hold circuit and an output end of the DAC; and a control circuit being connected with an output end of the comparator, wherein when the sample hold circuit receives an analog signal, the control circuit controls the sample hold circuit and the comparator to work, controls an output of the DAC based on an output of the comparator, and outputs a corresponding digital signal; and when the control circuit detects a digital signal is input, the control circuit controls the DAC to convert the digital signal into a corresponding analog signal and output the corresponding analog signal. ### Claim 2 (depends on 1) The circuit according to claim 1, wherein the control circuit comprises: a first register for storing an output signal of the comparator; a second register for storing the digital signal; and a path controller for controlling the DAC based on a value of the first register or a value of the second register. ### Claim 3 (depends on 2) The circuit according to claim 2, wherein the path controller adjusts a value of an output voltage of the DAC based on the value of the first register, so that the output voltage of the DAC successively approximates an output of the sample hold circuit. ### Claim 4 (depends on 3) The circuit according to claim 3, wherein the path controller uses a bisection method to adjust the value of the output voltage of the DAC. ### Claim 5 (depends on 2) The circuit according to claim 2, wherein the first register and the second register have the same storable bits. ### Claim 6 (depends on 2) The circuit according to claim 2, wherein the path controller controls the DAC to convert the digital signal based on the value of the second register, and the DAC outputs the converted signal. ### Claim 7 (depends on 1) The circuit according to claim 1, wherein under control of the control circuit, the sample hold circuit samples the input analog signal, and outputs a voltage value of the sampled analog signal. ### Claim 8 (depends on 7) The circuit according to claim 7, wherein under control of the control circuit, the comparator compares the voltage value of the sampled signal output by the sample hold circuit, with the output voltage value output by the DAC. ### Claim 9 (depends on 8) The circuit according to claim 8, wherein when the output voltage value of the DAC is less than the voltage value of the sampled signal, the comparator outputs a logic low level; and when the output voltage value of the DAC is greater than the voltage value of the sampled signal, the comparator outputs a logic high level. ### Claim 10 A communication device, comprising: a converting circuit adapted for converting a received digital signal into an analog signal, or converting a received analog signal into a digital signal, wherein the converting circuit comprises: a sample hold circuit for receiving an analog signal; a Digital to Analog Converter (DAC); a comparator being connected with an output end of the sample hold circuit and an output end of the DAC; and a control circuit being connected with an output end of the comparator, wherein when the sample hold circuit receives an analog signal, the control circuit controls the sample hold circuit and the comparator to work, controls an output of the DAC based on an output of the comparator, and outputs a corresponding digital signal; and when the control circuit detects a digital signal is input, the control circuit controls the DAC to convert the digital signal into a corresponding analog signal and output the corresponding analog signal. ### Claim 11 (depends on 10) The device according to claim 10, wherein the control circuit comprises: a first register for storing an output signal of the comparator; a second register for storing the digital signal; and a path controller for controlling the DAC based on a value of the first register or a value of the second register. ### Claim 12 (depends on 11) The device according to claim 11, wherein the path controller adjusts a value of an output voltage of the DAC based on the value of the first register, so that the output voltage of the DAC successively approximates an output of the sample hold circuit. ### Claim 13 (depends on 12) The device according to claim 12, wherein the path controller uses a bisection method to adjust the value of the output voltage of the DAC. ### Claim 14 (depends on 11) The device according to claim 11, wherein the first register and the second register have the same storable bits. ### Claim 15 (depends on 11) The device according to claim 11, wherein the path controller controls the DAC to convert the digital signal based on the value of the second register, and the DAC outputs the converted signal. ### Claim 16 (depends on 10) The device according to claim 10, wherein under control of the control circuit, the sample hold circuit samples the input analog signal, and outputs a voltage value of the sampled analog signal. ### Claim 17 (depends on 16) The device according to claim 16, wherein under control of the control circuit, the comparator compares the voltage value of the sampled signal output by the sample hold circuit, with the output voltage value output by the DAC. ### Claim 18 (depends on 17) The device according to claim 17, wherein when the output voltage value of the DAC is less than the voltage value of the sampled signal, the comparator outputs a logic low level; and when the output voltage value of the DAC is greater than the voltage value of the sampled signal, the comparator outputs a logic high level.