# US 2015/0103633 A1 · Adaptive timing congfiguration for athletic devices > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2015/0103633 A1 - Document ID: US20150103633A1 - Status: Published application - Kind: A1 - Application number: 14/512,854 - Filed: 2014-10-13 - Published: 2015-04-16 - Earliest claimed: 2013-10-14 - Assignees: NIKE, Inc. - Applicants: NIKE, Inc. - Inventors: Kristofer Henderson; James Bielman - Web page: https://patentgrep.com/patent/US20150103633A1 ## CPC - G04G 19/12: Arrangements for reducing power consumption during storage - G04G 13/02: at preselected times, e.g. alarm clocks - G04G 21/02: Detectors of external physical values, e.g. temperature - G06F 1/14: Time supervision arrangements, e.g. real time clock - G06F 1/3206: Monitoring of events, devices or parameters that trigger a change in power modality - G04G: ELECTRONIC TIME-PIECES - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A system configured to allow one or more timing processes to accurately keep track of one or more timers while a processor executing the one or more timing processes is in a low-power operational mode. The system is configured to set a real-time clock alarm expiration time equal to a closest expiration time, from a current time, of the one or more timers. Accordingly, upon expiration of the real-time clock alarm, an interrupt is communicated to the processor, resulting in the processor being brought out of a low-power operational mode, and executing one or more processes associated with the corresponding expired timer. ## Claims ### Claim 1 An apparatus, comprising: a processor; a real-time clock alarm module, operatively connected to the processor, and configured to expire a real-time clock alarm after an alarm expiration period; a real-time clock calendar module, operatively connected to the real-time clock alarm module, and configured to trigger an expiration of the real-time clock alarm upon agreement between a real-time clock calendar time and an expiration time associated with the real-time clock alarm; and memory storing computer-readable instructions that, when executed by the processor, cause the apparatus to: store one or more timers in a queue, wherein said queue is ordered in order of increasing expiration time for said one or more timers; identify, upon expiration of the real-time clock alarm, one or more expired timers from the one or more timers stored in the queue; execute one or more processes associated with the one or more expired timers; remove the one or more expired timers from the queue; and set the alarm expiration period equal to a first expiration time associated with a first timer remaining in the queue. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the computer-readable instructions, when executed by the processor, further cause the apparatus to: set an operational mode of the processor upon setting the alarm expiration period. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the operational mode of the processor is a low-power operational mode. ### Claim 4 (depends on 3) The apparatus of claim 3, wherein the low-power operational mode operates the processor at a low frequency. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the real-time clock alarm module is configured to trigger an interrupt on the processor upon expiration of the real-time clock alarm. ### Claim 6 (depends on 5) The apparatus of claim 5, wherein the interrupt wakes the processor from a low-power operational mode. ### Claim 7 (depends on 6) The apparatus claim 6, wherein the low-power operational mode reduces power consumption by the processor by at least 90%. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the apparatus comprises an STM32 microcontroller. ### Claim 9 A unitary apparatus configured to be worm by a user, comprising: a structure configured to be worn around an appendage of a user, comprising: a power supply; a sensor configured to capture acceleration data from the appendage of the user; a processor, operatively connected to the sensor, and configured to receive captured acceleration data; a real-time clock alarm module, operatively connected to the processor, and configured to expire a real-time clock alarm after an alarm expiration period; a non-transitory computer-readable medium comprising computer-executable instructions that when executed by the processor cause the processor to perform at least: store one or more timers in a data structure; identify, upon expiration of the real-time clock alarm, one or more expired timers from the one or more timers stored in the data structure; execute one or more processes associated with the one or more expired timers; remove the one or more expired timers from the data structure; and set the alarm expiration period equal to a first expiration time associated with a first timer in the data structure that has a closest expiration time to a current time. ### Claim 10 (depends on 9) The unitary apparatus of claim 9, wherein the computer-executable instructions, when executed by the processor, further cause the processor to: set an operational mode of the processor upon setting the alarm expiration period. ### Claim 11 (depends on 10) The unitary apparatus of claim 10, wherein the operational mode of the processor is a low-power operational mode. ### Claim 12 (depends on 11) The unitary apparatus of claim 11, wherein the low-power operational mode reduces power consumption by the processor by at least 90%. ### Claim 13 (depends on 11) The unitary apparatus of claim 11, wherein the computer-executable instructions, when executed by the processor, cause the processor to further perform: wake the processor from the low-power operational mode upon receipt of acceleration data with a predetermined acceleration characteristic. ### Claim 14 (depends on 9) The unitary apparatus of claim 9, wherein the real-time clock alarm module is configured to trigger an interrupt on the processor upon expiration of the real-time clock alarm. ### Claim 15 (depends on 14) The unitary apparatus of claim 14, wherein the interrupt wakes the processor from a low-power operational mode. ### Claim 16 (depends on 9) The unitary apparatus of claim 9, wherein the computer-executable instructions, when executed by the processor, cause the processor to further perform: store a timeout timer in the data structure if no acceleration data is received during a predetermined timeout time period. ### Claim 17 (depends on 9) The unitary apparatus of claim 9, wherein the structure configured to be worm around an appendage of a user further comprises a microcontroller. ### Claim 18 A non-transitory computer-readable medium comprising computer-executable instructions that when executed by a processor are configured to perform at least: store one or more timers in a data structure; identify, upon expiration of a real-time clock alarm associated with a real-time clock alarm module, one or more timers, from the data structure, that will expire within a predetermined active time period from a current time indicated by a real-time clock calendar module; execute one or more processes associated with the one or more timers that will expire during the predetermined active time period; set an alarm expiration period of the real-time clock alarm module equal to a future expiration time associated with a timer in the data structure, wherein the future expiration time is a closest expiration time, from the one or more timers, to the current time; and set a low-power operational mode of the processor upon setting the alarm expiration period. ### Claim 19 (depends on 18) The non-transitory computer-readable medium of claim 18, wherein the real-time clock alarm module is configured to trigger an interrupt on the processor, setting a high-power operational mode of the processor, upon expiration of the real-time clock alarm ### Claim 20 (depends on 18) The non-transitory computer-readable medium of claim 18, wherein the low-power operational mode reduces a clock frequency of operation of the processor by at least 90%.