Determining A High Data Rate For Backchannel Communications For Initialization of High-Speed Networks

A method, comprising:

• setting transmitter circuitry, upon initialization of the transmitter circuitry, to transmit data frames to a link partner using at least one high rate link speed;
• applying at least one equalization preset setting to the transmitter circuitry while the transmitter circuitry is transmitting the data frames to the link partner;
• and
• dwelling, for a transmitter dwell time period by the transmitter circuitry, for the at least one equalization preset setting at the at least one high rate link speed, for a time period sufficient to allow the link partner to lock on to the transmitted data frames.

A system comprising, one or more storage devices having stored thereon, individually or in combination, instructions that when executed by one or more processors result in the following operations comprising:

• set transmitter circuitry, upon initialization of the transmitter circuitry, to transmit data frames to a link partner using at least one high rate link speed;
• apply at least one equalization preset setting to the transmitter circuitry while the transmitter circuitry is transmitting the data frames to the link partner;
• and
• dwell, for a transmitter dwell time period by the transmitter circuitry, for the at least one equalization preset setting at the at least one high rate link speed, for a time period sufficient to allow the link partner to lock on to the transmitted data frames.

A node comprising:

• a processor;
• a memory;
• and
• a network controller, comprising:
• physical interface (PHY) circuitry comprising transmitter circuitry configured to transmit data frames to a link partner in communication with the transmit circuitry over a channel link;
• a link speed cycling module configured to, upon initialization of the PHY circuitry, cause the transmitter circuitry to transmit data frames to the link partner using at least one high rate link speed;
• and
• an equalization presets module configured to apply at least one equalization preset setting to the transmitter circuitry while the transmitter circuitry is transmitting the data frames to the link partner;
• wherein the link speed module is further configured to cause the transmitter circuitry to dwell, for a transmitter dwell time period, for the at least one equalization preset setting at the at least one high rate link speed;
• wherein the transmitter dwell time period is sufficient to allow the link partner to lock on to the transmitted data frames.