Enhancement of the Implementation of the High Speed Cell FACH/RACH Feature

An apparatus, comprising:

• one or more processors;
• and
• one or more memories including computer program code,
• the one or more memories and the computer program code configured, with the one or more processors, to cause the apparatus to perform at least the following:
• adapting a high speed Cell_FACH feature to a load of a cell, the adapting performed at least by changing a value of a data volume threshold corresponding to HS_FACH user equipment so delay experienced by a user equipment in a Cell_FACH state is kept lower than a delay the user equipment would experience if moved to a Cell_DCH state, where the value of the data volume threshold determines a data volume that, if not exceeded, causes a user equipment to be kept in the Cell_FACH state;
• and
• deciding for each user equipment in the Cell_FACh state whether to keep the user equipment in the Cell_FACH state or move the user equipment to the Cell_DCH state, the deciding for each user equipment based at least on the changed value for the data volume threshold and a data volume for the user equipment.