Circuit to generate a sense amplifier enable signal

A circuit comprising:

• at least one column of memory storage cells;
• a read/write circuitry coupled to the memory storage cells to access the memory storage cells, the read/write circuitry comprising a sense amplifier configured to read data of the memory storage cells upon receipt of a sense amplifier enable (SAE) signal;
• and
• a timing unit configured to generate the SAE signal in response to a first control signal, the timing unit comprising:
• a tracking bit line;
• a tracking unit connected to the tracking bit line, configured to selectively charge or discharge a voltage on the tracking bit line in response to a first control signal;
• and
• a detection unit coupled to the tracking bit line and configured to generate the SAE signal in response to a voltage level on the tracking bit line.

A method of generating a sense amplifier enable (SAE) signal for a memory circuit in response to a first control signal, the memory circuit being configured to have a read functionality a predetermined time delay after receipt of the first control signal, the method comprising:

• generating a tracking signal by a tracking unit in response to the first control signal by selectively charging or discharging a voltage of a tracking bit line;
• detecting the voltage of the tracking bit line;
• and
• generating the SAE signal according to the voltage of the tracking signal.