Non-volatile memory for high rewrite cycles application
AssigneeeMemory Technology Inc.
InventorsWen-Hao Ching, Yen-Hsin Lai, Shih-Chen Wang
Life of this patent
Estimating the term…
Abstract
A non-volatile memory has an array of non-volatile memory cells. Each of the non-volatile memory cells includes a coupling device formed on a first well, a read device, a floating gate device formed on a second well and coupled to the coupling device, a program device formed on the second well, and an erase device formed on a third well and coupled to the first floating gate device. The read device, the program device, and the erase device are formed on separate wells so as to separate the cycling counts of a read operation, a program operation and an erase operation of the non-volatile memory cell.
Claims25
A non-volatile memory cell comprising:
- a coupling device formed on a first well;
- a read device electrically connected to the coupling device;
- a floating gate device formed on a second well;
- a program device electrically connected to the floating gate device and formed on the second well;
- and
- an erase device formed on a third well;
- wherein the coupling device, the floating gate device and the erase device are coupled by a common floating gate.
A non-volatile memory comprising:
- a plurality of non-volatile memory cells;
- a plurality of first bit lines each coupled to first terminals of read devices of non-volatile memory cells in a corresponding column;
- a plurality of second bit lines each coupled to first terminals of program devices of non-volatile memory cells in a corresponding column;
- a plurality of first word lines each coupled to gates of read devices of non-volatile memory cells in a corresponding row;
- a plurality of second word lines each coupled to gates of program devices of non-volatile memory cells in a corresponding row;
- a plurality of source lines each coupled to second terminals of coupling devices of non-volatile memory cells in a corresponding row;
- and
- a plurality of erase lines each coupled to first terminals of erase devices of non-volatile memory cells in a corresponding row.
A method for operating a non-volatile memory cell, the non-volatile memory cell comprising a read device coupled to a first bit line and a first word line, a coupling device coupled to the read device and a source line, a program module coupled to a second bit line and a second word line, and an erase device coupled to the coupling device, the program module, and an erase line, the method comprising:
- activating the read device and the coupling device and deactivating the program module during a read operation;
- activating the program module and deactivating the read device during a program operation;
- activating the erase device and deactivating the read device during an erase operation;
- and
- wherein the read device and the program device operate independently of each other.
Dependencies are inferred from the claim text.