Solder void reduction between electronic packages and printed circuit boards
AssigneeInternational Business Machines Corporation
InventorPhillip D. Isaacs
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorPhillip D. Isaacs
Estimating the term…
A method includes fabricating a printed circuit board. The fabricating includes forming at least one conductive layer on top a first dielectric layer, wherein the at least one conductive layer comprises at least one of a ground plane and a power plane. The fabricating includes forming a second dielectric layer on top of the at least one conductive layer. The fabricating includes forming a thermal pad on top of the second dielectric layer. The fabricating includes forming at least one plated through hole for electrically coupling the thermal pad to the at least one conductive layer. The fabricating includes backdrilling the at least one plated through hole to remove a portion of the conductive material, wherein subsequent to the backdrilling the conductive material remaining in the at least one plated through hole electrically couples one or more of the at least one conductive layer to the thermal pad.
A method comprising:
The method of claim I, wherein the at least one conductive layer comprises at least three conductive layers, wherein the backdrilling comprises:
A method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.