Integrated circuit and code generating method
AssigneePhison Electronics Corp.
InventorHiroshi Watanabe
Life of this patent
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Abstract
An integrated circuit and a code generating method are described. The integrated circuit includes a plurality of field effect transistors, a plurality of sense-amplifiers, and a processing circuit. Each field effect transistor is configured to represent an address in a mapping table and includes a source, a drain, a channel and a gate. Each sense-amplifier is connected to the drain and configured to sense an electric current from the drain and identify a threshold voltage of the corresponding field effect transistor. The processing circuit is configured to categorize each of the threshold voltages identified by the corresponding sense-amplifiers into a first state and a second state and mark the state of each of the threshold voltages at the corresponding address in the mapping table.
Claims32
An integrated circuit, comprising:
- at least one first input/output end;
- at least one current path, connected with the first input/output end;
- at least one control end, disposed above the at least one current path, configured to apply a plurality of control end voltages on the at least one current path;
- and
- at least one second input/output end, connected with the current path;
- wherein, the width and the thickness of the current path are defined according to the de Broglie length (DBL), and the length of the current path is longer than the width and the thickness of the current path.
An integrated circuit, comprising:
- a plurality of semiconductor cells, each semiconductor cell being configured to represent an address in a mapping table and comprising a first input/output end, a second input/output end, a current path and a control end;
- a plurality of sense-amplifiers, each connected to the second input/output end and being configured to sense an electric current from the second input/output end and identify a threshold voltage of the corresponding semiconductor cell;
- and
- a processing circuit, configured to categorize each of the threshold voltages identified by the corresponding sense-amplifiers into a first state and a second state and mark the state of each of the threshold voltages at the corresponding address in the mapping table.
A code generating method, adopted in an integrated circuit having a plurality semiconductor cells, each of the semiconductor cells comprising a first input/output end, a second input/output end and a current path, wherein the width and the thickness of the current paths are defined according to de Broglie length (DBL), and at least one dopant ion is randomly doped in the current paths of the semiconductor cells, the method comprising:
- configuring each cell to represent an address in a mapping table;
- determining a first read voltage and a reference current;
- sensing an electric current from the second input/output end and identifying a threshold voltage of the corresponding semiconductor cell;
- categorizing each of the threshold voltages into a first state and a second state;
- and
- marking each cell at the corresponding address of the mapping table according to the state of the threshold voltages.
An integrated circuit, comprising:
- at least one first input/output end;
- at least one current path, connected with the first input/output end;
- at least one control end, disposed above the at least one current path, configured to apply a plurality of control end voltages on the at least one current path;
- and
- at least one second input/output end, connected with the current path;
- wherein at least one current adjusting element is disposed in the at least one current path to adjust an electrical current.
An integrated circuit, comprising:
- a plurality of semiconductor cells, each semiconductor cell being configured to represent an address in a mapping table and comprising a first input/output end, a second input/output end, a current path and a control end, wherein at least one current adjusting element is disposed in at least one of the current paths to adjust an electrical current;
- a plurality of sense-amplifiers, each connected to the second input/output end and being configured to sense an electric current from the second input/output end and identify the threshold voltage of the corresponding semiconductor cell;
- and
- a processing circuit, configured to categorize each of the threshold voltages identified by the corresponding sense-amplifiers into a first state and a second state and mark the state of each of the threshold voltages at the corresponding address in the mapping table.
A code generating method, adopted in an integrated circuit having a plurality semiconductor cells, each of the semiconductor cells comprising a first input/output end, a second input/output end and a current path, the method comprising:
- configuring each cell to represent an address in a mapping table;
- determining a first read voltage and a reference current;
- sensing an electric current from the second input/output end and identifying a threshold voltage of the corresponding semiconductor cell, wherein at least one current adjusting element is disposed in at least one of the current paths to adjust the electrical current;
- categorizing each of the threshold voltages into a first state and a second state;
- and
- marking each cell at the corresponding address of the mapping table according to the state of the threshold voltages.
Dependencies are inferred from the claim text.