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US 2015/0091633 A1Published application
Design method and design device
AssigneeFujitsu Semiconductor Limited
InventorsAtsushi TSUCHIYA, Seiji GOTO, Kimihiro SAWADA
Life of this patent
Estimating the term…
Abstract
A design method is executed by a computer. The design method includes grouping logical modules in each of power domains arranged on a chip; provisionally arranging regular cells in each of logical module groups formed by the grouping; and arranging power switches around each of the logical module groups.
Claims16
A design method executed by a computer, the design method comprising:
- grouping logical modules in each of power domains arranged on a chip;
- provisionally arranging regular cells in each of logical module groups formed by the grouping;
- and
- arranging power switches around each of the logical module groups.
1 more element
A non-transitory computer-readable recording medium storing a design program that causes a computer to execute a process comprising:
- grouping logical modules in each of power domains arranged on a chip;
- provisionally arranging regular cells in each of logical module groups formed by the grouping;
- and
- arranging power switches around each of the logical module groups.
1 more element
A design device comprising:
- a processor programmed to execute a process including
- grouping logical modules in each of power domains arranged on a chip,
- provisionally arranging regular cells in each of logical module groups formed by the grouping, and
- arranging power switches around each of the logical module groups.
1 more element
A device comprising:
- a power domain, wherein
- regular cells arranged in the power domain are grouped, and power switches are arranged around each of the groups.
Dependencies are inferred from the claim text.