Power saving technique for digital to time converters
AssigneeIntel IP Corporation
InventorsPaolo Madoglio, Georgios Palaskas, Bernd-Ulrich Klepser, Andreas Menkhoff, Zdravko Boos, Andreas Boehme, Michael Bruennert
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Abstract
This document discusses apparatus and methods for reducing energy consumption of digital-to-time converter (DTC) based transmitters. In an example, a wireless device can include a digital-to-time converter (DTC) configured to receive phase information from a baseband processor and to provide a first modulation signal for generating a wireless signal, and a detector configured to detect an operating condition of the wireless device and to adjust a parameter of the DTC in response to a change in the operating condition.
Claims26
A wireless device comprising:
- a digital-to-time converter (DTC) configured to receive phase information from a baseband processor and to provide a first modulation signal for generating a wireless signal;
- and
- a detector configured to detect an operating condition of the wireless device and to adjust a parameter of the DTC in response to a change in the operating condition.
A method for operating a wireless transmitter comprising:
- receiving phase information from a baseband processor at a first digital-to-time converter (DTC);
- adjusting a parameter of the first DTC in one or more frequency bands of the phase information;
- detecting a first change in an operating condition of the wireless transmitter;
- and
- adjusting a parameter of the first DTC in response to the first change.
A wireless transmitter including;
- an amplitude processing path configure to receive a baseband signal and to provide a channel amplitude signal;
- a phase processing path configured to receive the baseband signal and to provide a channel phase signal;
- a digital-to-time converter (DTC) configured to provide a frequency modulated output clock signal using the channel phase signal;
- a divider module located in the phase processing path prior to the DTC;
- first and second noise shapers located in the phase processing path prior to the DTC, wherein the first noise shaper is located prior to the divider, and wherein the second noise shaper is located after the divider;
- and
- a mixer configured to receive the channel amplitude signal and the frequency modulated clock signal and to provide a reconstructed signal to a power amplifier for amplification.
Dependencies are inferred from the claim text.