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US 2015/0091168 A1Published application
Multi-chip package
AssigneeSamsung Electronics Co., Ltd.
InventorKeun-Ho CHOI
Life of this patent
Estimating the term…
Abstract
A multi-chip package may include a bonding finger. The bonding finger may have a bonding portion having a wide width so that lower ends of conductive wires may be accurately connected to the wide bonding portion. Thus, an electrical connection between a package substrate and semiconductor chips may be improved.
Claims20
A multi-chip package comprising:
- a package substrate having a plurality of bonding fingers on an upper surface thereof, each of the bonding fingers including a body portion and a bonding portion, the bonding portion having a width greater than a width of the body portion;
- a first semiconductor chip on the upper surface of the package substrate, the first semiconductor chip including a plurality of first bonding pads;
- a first conductive wire having a first end connected to at least one of the first bonding pads, and a second end connected to at least one of the bonding portions;
- a second semiconductor chip on an upper surface of the first semiconductor chip, the second semiconductor chip including a plurality of second bonding pads;
- and
- a second conductive wire having a first end connected to at least one of the second bonding pads, and a second end connected to the second end of the first conductive wire.
3 more elements
A multi-chip package comprising:
- a package substrate having a plurality of bonding fingers on an upper surface thereof and ball terminals on a lower surface of the package substrate, each of the bonding fingers including a body portion and a bonding portion, the bonding portion having a width greater than a width of the body portion;
- a first semiconductor chip arranged on the upper surface of the package substrate, the first semiconductor chip including a plurality of first bonding pads;
- a first conductive wire having a first end connected to at least one of the first bonding pads, and a second end connected to at least one of the bonding portions;
- a second semiconductor chip on an upper surface of the first semiconductor chip, the second semiconductor chip including a plurality of second bonding pads;
- a second conductive wire having a first end connected to at least one of the second bonding pads, and a second end connected to the second end of the first conductive wire;
- a molding member on the upper surface of the package substrate and covering the first semiconductor chip and the second semiconductor chip;
- and
- external terminals mounted on the ball terminals.
5 more elements
A multi-chip package comprising:
- a package substrate having a plurality of bonding fingers on an upper surface thereof, each of the bonding fingers including a body portion and a bonding portion;
- a first semiconductor chip on the upper surface of the package substrate, the first semiconductor chip including a plurality of first bonding pads, at least one of the first bonding pads being connected to a first end of a first conductive wire, a second end of the first conductive wire including a stitching portion coupled to at least one of the bonding portions;
- and
- a second semiconductor chip on an upper surface of the first semiconductor chip, the second semiconductor chip including a plurality of second bonding pads, at least one of the second bonding pads being connected to a first end of a second conductive wire, a second end of the second conductive wire including a bump portion coupled to the stitching portion.
1 more element
Dependencies are inferred from the claim text.