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US 2015/0091098 A1Published application
Semiconductor device having a monolithic inter-tier via (miv), and method of making same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsung-Hsien HUANG, Hong-Chen CHENG, Cheng-Hung LEE, Hung-Jen LIAO
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Abstract
A three dimensional semiconductor device includes a first memory device, a second memory device and a via. The via connects the first memory device to the second memory device.
Claims20
A three dimensional semiconductor device comprising:
- a first memory device;
- a second memory device;
- and
- a via, wherein the via connects the first memory device to the second memory device.
1 more element
A stacked semiconductor structure comprising:
- a first memory device, the first memory device comprising:
- a first transistor device;
- a bit line, wherein the first transistor device is connected to the bit line by a first drain via;
- a first word line, wherein the first transistor device is connected to the first word line;
- a second memory device, the second memory device comprising:
- a second transistor device;
- an inter-layer dielectric (ILD), wherein the first memory device and the second memory device are separated by the ILD;
- and
- a first via, wherein the first memory device is electrically connected to the second memory device by the first via.
6 more elements
A method of making a semiconductor device, the method comprising:
- forming a first memory device;
- connecting a first word line to the first memory device;
- forming at least a first via,
- forming a second memory device, wherein the first and second memory devices are separated by an inter-layer dielectric (ILD), and the first via connects the first memory device and the second memory device;
- connecting a second word line to the second memory device;
- connecting a bit line to the second memory device;
- and
- connecting the bit line to the first memory device by the first via.
5 more elements
Dependencies are inferred from the claim text.