Isolation formation first process simplification
AssigneeMacronix International Co., Ltd.
InventorGuan-Ru Lee
Life of this patent
Estimating the term…
Abstract
A method for manufacturing a memory device includes providing a substrate having a plurality of active layers, forming a plurality of holes through the plurality of active layers including a first row of holes and a second row of holes, and filling the plurality of holes with an isolation material. The method includes etching the plurality of active layers to form first and second sets of interdigitated stacks of active strips, where the first set includes strips extending from pads in a first stack of pads and terminating at isolation strips remaining from corresponding filled holes in the first row, and the second set includes strips extending from pads in a second stack of pads and terminating at isolation strips remaining from corresponding filled holes in the second row.
Claims17
A method for manufacturing a semiconductor device, comprising:
- providing a substrate having a plurality of active layers;
- forming a plurality of holes (BLC holes) through the plurality of active layers;
- and
- filling the plurality of holes with an isolation material (OX seals) to form filled holes,
- wherein the plurality of holes is positioned in the plurality of active layers such that a plurality of stacks of active strips can be formed in the plurality of active layers after said filling, and be terminated at the plurality of holes filled with the isolation material.
A method for manufacturing a semiconductor device, comprising:
- providing a substrate having a plurality of active layers;
- forming a plurality of holes (BLC holes) through the plurality of active layers including a first row of holes and a second row of holes;
- filling the plurality of holes with an isolation material to form filled holes;
- and
- etching the plurality of active layers and the filled holes to form first and second sets of interdigitated stacks of active strips aligned with and terminating at isolation strips, the first set comprising strips extending from pads in a first stack of pads and terminating at isolation strips remaining from corresponding filled holes in the first row, and the second set comprising strips extending from pads in a second stack of pads and terminating at isolation strips remaining from corresponding filled holes in the second row.
A semiconductor device, comprising:
- a substrate having a plurality of stacks of active strips including first and second sets of interdigitated stacks of active strips;
- and
- a first row of isolation strips and a second row of isolation strips,
- wherein active strips in the first set extend from pads in a first stack of pads and are aligned with and terminate at corresponding isolation strips in the first row, and active strips in the second set extending from pads in a second stack of pads and are aligned with and terminate at corresponding isolation strips in the second row.
A semiconductor device, comprising:
- a substrate having a plurality of stacks of active strips including strips of conductive material at an end of the plurality of stacks of active strips;
- and
- a row of isolation strips,
- wherein active strips in the plurality of stacks extend from a stack of pads and are aligned with and terminate at the row of isolation strips at the end of the plurality of stacks of active strips with the conductive material.
Dependencies are inferred from the claim text.