Hierarchical Approach to Triple Patterning Decomposition
AssigneeInternational Business Machines Corporation
InventorsKanak B. Agarwal, Lars W. Liebmann
Life of this patent
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Abstract
A mechanism is provided in a data processing system for hierarchical triple patterning decomposition. The mechanism receives an integrated circuit design. The mechanism enforces boundary conditions on three-color mapping of shapes in a layer of the integrated circuit design at the cell level. The mechanism places cells in the layer of the integrated circuit design. The mechanism identifies post placement coloring conflicts and resolves the post placement coloring conflicts with two-color flipping in coloring runs containing one or more conflicts.
Claims21
A method, in a data processing system, for hierarchical triple patterning decomposition, the method comprising:
- receiving an integrated circuit design;
- enforcing boundary conditions on three-color mapping of shapes in a layer of the integrated circuit design at the cell level;
- placing cells in the layer of the integrated circuit design;
- identifying post placement coloring conflicts;
- and
- resolving the post placement coloring conflicts with two-color flipping in coloring runs containing one or more conflicts.
A computer program product comprising a computer readable storage medium having a computer readable program stored therein, wherein the computer readable program, when executed on a computing device, causes the computing device to:
- receive an integrated circuit design;
- enforce boundary conditions on three-color mapping of shapes in a layer of the integrated circuit design at the cell level;
- place cells in the layer of the integrated circuit design;
- identify post placement coloring conflicts;
- and
- resolve the post placement coloring conflicts with two-color flipping in coloring runs containing one or more conflicts.
An apparatus comprising:
- a processor;
- and
- a memory coupled to the processor, wherein the memory comprises instructions which, when executed by the processor, cause the processor to:
- receive an integrated circuit design;
- enforce boundary conditions on three-color mapping of shapes in a layer of the integrated circuit design at the cell level;
- place cells in the layer of the integrated circuit design;
- identify post placement coloring conflicts;
- and
- resolve the post placement coloring conflicts with two-color flipping in coloring runs containing one or more conflicts.
Dependencies are inferred from the claim text.