Semiconductor memory devices and memory systems including the same

A memory system, comprising:

• a memory module including a plurality of semiconductor memory devices;
• and
• a memory controller configured to control the semiconductor memory devices, wherein each of the semiconductor memory devices comprises:
• a memory cell array comprising a plurality of memory cells arranged in rows and columns, wherein the memory cell array is divided into a first memory region and a second memory region;
• and
• an error correction code (ECC) circuit configured to correct single-bit errors of the first memory region using parity bits,
• wherein the first memory region provides a consecutive address space to the memory controller by correcting the single-bit errors by the ECC circuit and the second memory region is reserved for repairing at least one of a first failed page of the first memory region or a second failed page of the second memory region.

A semiconductor memory device comprising:

• a first memory region including a first plurality of pages having a first range of page addresses, and connected to a plurality of memory cells;
• a second memory region including a second plurality of pages having a second range of page addresses, and connected to a plurality of memory cells, wherein each page address of the first range is different from each page address of the second range;
• and
• a page control circuit configured to select any one of the first pages by a corresponding first page address and to select any one of second pages by a corresponding second page address, and configured to replace at least one of a first failed page of the first memory region or a second failed page of the second memory region with a first page of the second memory region.