Interrupt supervision system, processing system and method for interrupt supervison

An interrupt supervision system, comprising:

• a plurality of interrupt request input lines;
• at least one interrupt request output line;
• an interrupt controller device connected to said interrupt request input lines, for receiving, on said plurality of interrupt request input lines, a plurality of interrupt requests, said interrupt controller device being arranged to generate a sequence of interrupt requests from said plurality of interrupt requests depending on one or more priorities assigned to said interrupt requests and to output said plurality of interrupt requests in said sequence on at least one of said at least one interrupt request output lines;
• said interrupt supervision system further comprising at least one interrupt checker device connected to at least a selected one of said interrupt request lines, for receiving a reception indication indicating that said interrupt controller device has received on said selected interrupt request line a selected interrupt request, and at least one of said output lines;
• said at least one interrupt checker device being arranged to provide an error indication when an output of said selected interrupt request on said at least one output line has not been confirmed within a latency period assigned to said selected interrupt request, said latency period beginning when said interrupt checker device receives said reception indication.