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US 2015/0089280 A1Published application
Recovery from multiple data errors
AssigneeIntel Corporation
InventorsRaanan Sade, Ron Gabor, Deep K. Buch, Theodros Yigzaw, Stanislav Shwartsman
Life of this patent
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Abstract
Mechanisms for handling multiple data errors that occur simultaneously are provided. A processing device may determine whether multiple data errors occur in memory locations that are within a range of memory locations. If the multiple memory locations are within the range of memory locations, the processing device may continue with a recovery process. If one of the multiple memory locations is outside of the range of memory locations, the processing device may halt the recovery process.
Claims20
A processor comprising:
- an execution unit communicatively coupled to a memory;
- and
- error recovery logic coupled to the execution unit, the error recovery logic to:
- detect a first error when a first memory location in the memory is accessed by the execution unit;
- initiate a recovery process to recover from the first error;
- detect a second error when a second memory location in the memory is accessed by the execution unit while the recovery process is being performed;
- determine whether the first memory location and the second memory location are in a range of memory locations;
- and
- continue the recovery process when the first memory location and the second memory location are in the range of memory locations.
6 more elements
A method comprising:
- detecting a first error when a first memory location in a memory is accessed;
- initiating a recovery process to recover from the first error;
- detecting a second error when a second memory location in the memory is accessed while the recovery process is being performed;
- determining whether the first memory location and the second memory location are in a range of memory locations;
- and
- continuing the recovery process when the first memory location and the second memory location are in the range of memory locations.
3 more elements
A system comprising:
- a memory to store data;
- and
- a processor communicatively coupled to the memory, the processor to:
- detect a first error when a first memory location in the memory is accessed by the processor;
- initiate a recovery process to recover from the first error;
- detect a second error when a second memory location in the memory is accessed by the processor while the recovery process is being performed;
- determine whether the first memory location and the second memory location are in a range of memory locations;
- and
- continue the recovery process when the first memory location and the second memory location are in the range of memory locations.
6 more elements
Dependencies are inferred from the claim text.