Implementing memory module communications with a host processor in multiported memory configurations

A method for implementing ECC (Error Correction Codes) memory module communications with a host processor in multi-ported memory configuration in a computer system comprising:

• providing a memory controller coupled to the host processor and each of multiple memory modules, said memory controller comprising an ECC generator and ECC decoder;
• enabling each of said multiple memory modules operating in unison to identify one memory module required to communicate module specific information back to the host processor;
• and
• generating back to the host processor a valid ECC word with all of said multiple memory modules operating in unison, while other multiple memory modules individually being unaware of data contents of said one memory module required to communicate back to the processor.