Processing apparatus and processing method

A processing apparatus, comprising:

• a first processor;
• a second processor;
• a first storage which data read or data write is done by one or more fixed-size blocks, data in each block having a sequential address;
• and
• a controller to control operation of at least one of the first processor and the second processor, wherein
• one of the first processor and the second processor writes, to the first storage, first to N-th data pieces in order to deliver the first to N-th data pieces to the other processor so that an ending address of an X-th data piece and a starting address of an X+1-th data piece are sequential addresses wherein “N” being an integer of 2 or more and “X” being an integer of 1 or more and
• the controller sets the other processor in a low power consumption mode during at least a part of a period in which the one processor performs writing to the first storage, and after completion of the writing to the first storage, the controller sets the other processor in a different operating mode such as normal operating mode or active operating mode in which the other processor is capable of reading the first to N-th data pieces from the first storage.