Information processing apparatus, information processing system, and computer program product

An information processing system comprising:

• an information processing apparatus;
• and
• a verification server coupled to the information processing apparatus through a network, wherein
• the information processing apparatus includes
• a main processor configured to be selectively switched between a secure mode and in a non-secure mode, and perform certain data processing in the selected mode;
• an address space controller configured to set access rights to a main memory independently for each mode of the main processor, the access rights including read permission and write permission;
• a secure monitor memory setting module configured to set, to the address space controller, a first memory area from which data is readable in both modes and into which data is writable only in the secure mode, a second memory area from which data is readable and into which data is writable in both modes, and a third memory area from which data is readable and into which data is writable only in the secure mode;
• a non-secure operating system (OS) module configured to run in the non-secure mode, the non-secure OS module being allocated in the second memory area;
• a secure OS module configured to run in the secure mode, the secure OS module being allocated in the third memory area;
• and
• a timer configured to generate an interrupt to the main processor at a certain period and notify a secure monitor of the interrupt, wherein
• the secure monitor is configured to instruct the secure OS module to execute certain processing when receiving a notification of the interrupt from the timer,
• the secure OS module is configured to perform the certain processing instructed by the secure monitor and store data of a result of the processing in the first memory area,
• the secure OS module includes a data updating module configured to update certain data every time the data updating module receives an instruction to execute the certain processing from the secure monitor having been received the notification of the interruption from the timer,
• the non-secure OS module includes an encrypted data reader configured to read the encrypted data from the first memory area and transmit the read data to the verification server, and
• the verification server includes a data decryption module configured to decrypt the data received from the encryption data reader using a certain key corresponding to a key used for the encryption, and transmit the decrypted data to the encrypted data reader.

An information processing apparatus comprising:

• a main processor configured to be selectively switched between a secure mode and in a non-secure mode, and perform certain data processing in the selected mode;
• an address space controller configured to set access rights to a main memory independently for each mode of the main processor, the access rights including read permission and write permission;
• a secure memory setting module configured to set, to the address space controller, a fourth memory area in which reading and writing of data in the non-secure mode is prohibited and reading and writing of data only in the secure mode is permitted, a fifth memory area from which data is readable and into which data is writable in both modes, and a sixth memory area into which data is writable only in the secure mode, and further perform setting such that a transition of processing to the secure mode is performed when an access in the non-secure mode is made to the sixth memory area;
• a non-secure operating system (OS) module configured to run in the non-secure mode, the non-secure OS module being allocated in the sixth memory area;
• and
• a secure OS module configured to run in the secure mode, the secure OS module being allocated in the fourth memory area, wherein
• the secure OS module is configured to investigate an address to which an access is made in the sixth memory area when the access in the non-secure mode is made to the sixth memory area.

A computer program product comprising a computer-readable medium containing a program executed by a computer that includes a main processor configured to be selectively switched between a secure mode and in a non-secure mode, and perform certain data processing in the selected mode;

• and an address space controller configured to set access rights to a main memory independently for each mode of the main processor, the access rights including read permission and write permission, the program causing the computer to include:
• a secure monitor memory setting module configured to set, to the address space controller, a first memory area from which data is readable in both modes and into which data is writable only in the secure mode, a second memory area from which data is readable and into which data is writable in both modes, and a third memory area from which data is readable and into which data is writable only in the secure mode;
• a non-secure operating system (OS) module configured to run in the non-secure mode, the non-secure OS module being allocated in the second memory area;
• a secure OS module configured to run in the secure mode, the secure OS module being allocated in the third memory area;
• and
• a timer configured to generate an interrupt to the main processor at a certain period and notify a secure monitor of the interrupt, wherein
• the secure monitor instructs the secure OS module to execute certain processing when receiving a notification of the interrupt from the timer, and
• the secure OS module is configured to perform the certain processing instructed by the secure monitor and store data of a result of the processing in the first memory area.