Hazard Check Instructions for Enhanced Predicate Vector Operations

A method comprising executing an instruction in a processor, the instruction having a plurality of operands that specify a first one or more addresses corresponding to a first vector memory operation and a second one or more addresses corresponding to a second vector memory operation, wherein at least one of the first one or more addresses and the second one or more addresses are based on a scalar address in the plurality of operands and further dependent on a vector attribute of the corresponding first vector memory operation or second vector memory operation, wherein the executing includes:

• detecting whether or not a dependency exists between the first vector memory operation and the second memory operation;
• and
• generating a dependency vector that indicates, where a dependency exists for a first element of the first vector memory operation on a second element of the second memory operation, an element position of the second element.

A processor comprising:

• an execution core configured to execute an instruction having a plurality of operands that specify a first one or more addresses corresponding to a first vector memory operation and a second one or more addresses corresponding to a second vector memory operation, and wherein the plurality of operands further include a first predicate that includes an attribute corresponding to one of the first vector memory operation or the second memory operation, wherein the attribute defines at least one of a size of vector elements in the corresponding vector memory operation, a number of vector elements in the corresponding vector memory operation, or a size of a vector in the corresponding vector memory operation, and wherein the execution core is configured to detect whether or not a dependency exists between the first vector memory operation and the second memory operation, wherein the detection of whether or not a dependency exists is based on the attribute, and wherein the execution unit is configured to generate a dependency vector that indicates, for each first element of a first vector memory operation that depends on a second element of the second memory operation, which second element that the first element depends on.