US 2015/0089173 A1 · SECURE MEMORY REPARTITIONING

Secure memory repartitioning

AssigneeIntel Corporation

InventorsSiddhartha Chhabra, Uday R. Savagaonkar, Michael A. Goldsmith, Simon P. Johnson, Rebekah M. Leslie-Hurd, Francis X. McKeen, Gilbert Neiger, Raghunandan Makaram, Carlos V. Rozas, Amy L. Santoni, Vincent R. Scarlata, Vedvyas Shanbhogue, Wesley H. Smith, Ittai Anati, Ilya Alexandrovich

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Abstract

Secure memory repartitioning technologies are described. A processor includes a processor core and a memory controller coupled between the processor core and main memory. The main memory includes a memory range including a section of convertible pages are convertible to secure pages or non-secure pages. The processor core, in response to a page conversion instruction, is to determine from the instruction a convertible page in the memory range to be converted and convert the convertible page to be at least one of a secure page or a non-secure page. The memory range may also include a hardware reserved section are convertible in response to a section conversion instruction.

Claims25

Dependent claims

A processor comprising:

a processor core;
and
a memory controller coupled between the processor core and main memory, wherein the main memory comprises a memory range comprising a section of convertible pages that are convertible to secure pages or non-secure pages, and wherein the processor core, in response to a page conversion instruction, is to:
determine from the instruction a convertible page in the memory range to be converted;
and
convert the convertible page to be at least one of a secure page or a non-secure page.

3 more elements

A system comprising:

a processor comprising a plurality of functional units to execute instructions;
and
a memory device coupled to the processor, wherein the memory device is operable to store code memory and data memory and comprises a memory range comprising a section of convertible pages are convertible to secure pages or non-secure pages, wherein the processor is configured to:
decode a page conversion instruction to convert a convertible page in the memory range;
and
execute the page conversion instruction to convert the convertible page to be at least one of a secure page or a non-secure page.

3 more elements

Dependencies are inferred from the claim text.

Facts

Application

14/034,813Filed 24 Sep 2013

Published

26 Mar 2015

Term ends

Not estimatedThe source records don’t support an estimate.

Classification10 codes

G06F 12/1408
Protection against unauthorised use of memory or access to memory: by using cryptography
G06F 9/45558
Hypervisors; Virtual machine monitors: hypervisor-specific management and integration aspects
G06F 12/0808
Multiuser, multiprocessor or multiprocessing cache systems: with cache invalidating means
G06F 12/1027
Address translation: using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]