Nested channel address interleaving
AssigneeAdvanced Micro Devices, Inc.
InventorsVydhyanathan Kalyanasundharam, Kevin M. Brandl, Adnan Dhanani
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Abstract
A system and method for mapping an address space to a non-power-of-two number of memory channels. Addresses are translated and interleaved to the memory channels such that each memory channel has an equal amount of mapped address space. The address space is partitioned into two regions, and a first translation function is used for memory requests targeting the first region and a second translation function is used for memory requests targeting the second region. The first translation function is based on a first set of address bits and the second translation function is based on a second set of address bits.
Claims20
A method comprising:
- partitioning an address space into at least a first portion and a second portion;
- translating first memory requests targeted to the first portion using a first set of memory request address bits such that the first memory requests are interleaved across N separate memory channels;
- and
- translating second memory requests targeted to the second portion using a second set of memory request address bits different from said first set of memory request address bits;
- wherein each memory channel is mapped to an equal amount of the address space.
A computing system comprising:
- N memory channels;
- and
- circuitry configured to:
- partition an address space into at least a first region and a second region;
- apply a first translation function to memory requests targeted to the first region, wherein the first translation function interleaves addresses across the N memory channels;
- and
- apply a second translation function to memory requests targeted to the second region, wherein the second translation function interleaves addresses across the N memory channels, wherein the first and second translation functions evenly map the address space to the N memory channels, and wherein the second translation function is different than the first translation function.
A non-transitory computer readable storage medium storing program instructions, wherein the program instructions are executable to:
- partition an address space into at least a first portion and a second portion;
- translate first memory requests targeted to the first portion using a first set of memory request address bits such that the first memory requests are interleaved across N separate memory channels;
- and
- translate second memory requests targeted to the second portion using a second set of memory request address bits different from the first set of memory request address bits such that the second memory requests are interleaved across N separate memory channels;
- wherein each memory channel is mapped to an equal amount of the address space.
Dependencies are inferred from the claim text.