Semiconductor isolation region uniformity
AssigneeGlobalfoundries Inc.
InventorsTsung-Liang CHEN, Hsin-Neng TAI, Puneet KHANNA, Zhenyu HU, Huey-Ming WANG
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AssigneeGlobalfoundries Inc.
InventorsTsung-Liang CHEN, Hsin-Neng TAI, Puneet KHANNA, Zhenyu HU, Huey-Ming WANG
Estimating the term…
Methods of facilitating isolation region uniformity include: patterning a semiconductor substrate to form at least one isolation opening within the semiconductor substrate, the patterning comprising leaving, at least in part, a protective hard mask above a portion of the semiconductor substrate; providing an insulating material within and over the at least one isolation opening, and planarizing the insulating material to facilitate fabricating an isolation region within the semiconductor substrate; stopping the planarizing on the protective hard mask and exposing at least a portion of the protective hard mask above the portion of the semiconductor substrate; and non-selectively removing a remaining portion of the insulating material over the at least one isolation opening and the exposed protective hard mask above the portion of the semiconductor substrate while leaving the insulating material within the at least one isolation opening and exposing upper surfaces of the semiconductor substrate, to facilitate isolation region uniformity.
A method comprising:
(canceled)
Dependencies are inferred from the claim text.