Eos protection circuit with fet-based trigger diodes
AssigneeInternational Business Machines Corporation
InventorsJohn J. Ellis-Monaghan, Alain Loiseau
Life of this patent
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AssigneeInternational Business Machines Corporation
InventorsJohn J. Ellis-Monaghan, Alain Loiseau
Estimating the term…
An integrated circuit is disclosed, including a circuit with a first type of FET having a first breakdown voltage (VBD), resulting from a first set of design and manufacturing process parameters and having VBD tracking characteristics resulting from a second set of design and manufacturing process parameters. The IC may include a trigger device circuit a having a trigger FET that may generate, in response to the supply voltage exceeding a specified maximum, a signal on a trigger device output, causing a clamping device to couple the supply voltage node to the ground, to reduce the supply voltage. The trigger FET may be of a second type having a second VBD less than the first VBD, resulting from modifications to the first set of design and manufacturing process parameters, and VBD tracking characteristics resulting from the second set of design and manufacturing process parameters.
An integrated circuit (IC) comprising:
A method for operating an electrical overstress (EOS) protection circuit, comprising:
Dependencies are inferred from the claim text.