Method of Successive Approximation A/D Conversion

A method of Successive Approximation Register (SAR) analog to digital conversion, the method including performance of N+1 SAR cycles to obtain an output digital code having N bits, wherein N is an integer number, the method comprising:

• receiving and sampling an analog signal;
• performing N−1 SAR cycles, each SAR cycle comprising:
• setting a tentative analog signal corresponding to an approximate value of the output digital code;
• and
• comparing, using a comparator, the sampled analog signal with the tentative analog signal;
• performing the Nth SAR cycle by:
• setting a Nth tentative analog signal corresponding to a provisional digital code;
• and
• comparing, using the comparator, the Nth tentative analog signal with the sampled analog signal to obtain a Nth comparison result, the comparing comprising performance of a plurality of M sub-comparisons between the Nth tentative analog signal and the sampled analog signal to obtain M sub-results, the Nth comparison result being obtained according to a first decision criterion that takes into account the M sub-results, M being an integer number;
• performing the (N+1)th SAR cycle by:
• setting a (N+1)th tentative analog signal based on the Nth comparison result;
• comparing, using the comparator, the (N+1)th tentative analog signal with the sampled analog signal to obtain a second comparison result by:
• performing a plurality of K sub-comparisons with the comparator between the (N+1)th tentative analog signal and the sampled analog signal, to obtain K sub-results, the (N+1)th comparison result being obtained according to a second decision criterion that takes into account the K sub-results, K being an integer number;
• and
• correcting the provisional digital code based on the (N+1)th comparison result for obtaining the output digital code.

A Successive Approximation Register (SAR) analog to digital converter comprising circuitry configured as:

• a sampling section configured to sample an analog signal to be converted into a digital code of N bits;
• a comparator connected to the sampling section and configured to compare the sampled analog signal with a tentative analog signal, and provide output signals as a function of the difference between the sampled analog signal and the tentative analog signal;
• a SAR logic unit coupled at the output of the comparator;
• wherein the SAR analog to digital converter is configured to:
• perform N−1 SAR cycles, N being an integer number, wherein in each of the N−1 SAR cycles:
• the SAR logic unit is configured to set a tentative analog signal corresponding to an approximate value of the output digital code;
• and
• the comparator is configured to compare the sampled analog signal with the tentative analog signal;
• perform the Nth SAR cycle, in which:
• the SAR logic unit is configured to set a Nth tentative analog signal corresponding to a provisional digital code;
• and
• the comparator is configured to compare the Nth tentative analog signal with the sampled analog signal in order to obtain a Nth comparison result by performing a plurality of M sub-comparisons between the Nth tentative analog signal and the sampled analog signal, in order to obtain M sub-results, the Nth comparison result being obtained according to a first decision criterion that takes into account the M sub-results, M being an integer number;
• perform the (N+1)th SAR cycle in which:
• the SAR logic unit is configured to set a (N+1)th tentative analog signal based on the first comparison result;
• and
• the comparator is configured to compare the (N+1)th tentative analog signal with the sampled analog signal in order to obtain a (N+1)th comparison result by performing a plurality of K sub-comparisons between the (N+1)th tentative analog signal and the sampled analog signal to obtain K sub-results, the (N+1)th comparison result being obtained according to a second decision criterion that takes into account the K sub-results, K being an integer number;
• the SAR logic unit is configured to correct the provisional digital code based on the second comparison result.