Semiconductor chip including a spare bump and stacked package having the same

An electronic system comprising:

• a memory;
• and
• a controller configured to communicate with the memory through a bus,
• wherein the memory includes a stacked package, comprising:
• a plurality of semiconductor chips including:
• a semiconductor substrate, a circuit layer formed over the semiconductor substrate, a bump formed over the circuit layer, a spare bump formed correspondingly to the bump and over the circuit layer, and configured for replacing the bump with the spare bump, a through electrode configured to pass through the semiconductor substrate on a same line as the bump and electrically couple with the bump or the spare bump by selective signal routing, and a spare through electrode configured to pass through the semiconductor substrate on a same line as the spare bump and electrically couple with the bump or the spare bump by selective signal routing,
• wherein when a bump fails, a vertical input/output line of the semiconductor chips is established by a spare bump corresponding to the failed bump through the selective signal routing.