US 2015/0084665 A1Published application

Method and system for testing semiconductor device

AssigneeSK hynix Inc.

InventorsKie-Bong KU, Lee-Bum LEE

Life of this patent

Estimating the term…

Abstract

A method for testing a semiconductor device includes testing the semiconductor device in a plurality of operation modes sequentially, and programming the semiconductor device to operate in at least one of the operation modes when the semiconductor device passes the testing.

Claims8

Dependent claims

1-14. (canceled)

Dependencies are inferred from the claim text.

Facts

Application: 14/556,019Filed 28 Nov 2014
Priority: KR 10-2010-012994617 Dec 2010
Published: 26 Mar 2015
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

G01R 31/26
Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by…
G01R 31/2834
Specific tests of electronic circuits not provided for elsewhere: automated test systems [ATE]; using microprocessors or computers
G11C 29/08
Detection or location of defective memory elements , e.g. cell constructio details, timing of test signals: functional testing, e.g. testing…
G11C 29/44
Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details: indication or identification of errors, e.g. for…

Family

Application13/150,782Division · filed 1 Jun 2011
Application14/556,019Division
US 2012/0153984 A1Published application
US 8,922,235 B2Related patent
US 9,274,162 B2Related patent
US 2015/0084665 A1This patent

From the US filing history. Foreign family members aren’t listed.

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