Adaptive equalizer

A method of operation in an equalizer comprising equalizer circuitry, a mean squared error (MSE) system, and adaptive control logic, the method comprising:

• the equalizer circuitry outputting an equalized signal in response to an input signal, a plurality of gain control signals, and a plurality of dither control signals, the equalizer circuitry having a plurality of taps, each tap controlled by a set of control signals comprising one of the plurality of gain control signals and one of the plurality of dither control signals;
• the MSE system providing an output MSE value in response to the equalized signal during each of a plurality of cycles;
• the adaptive control logic adjusting the plurality of gain control signals and the plurality of dither control signals in response to an MSE value, the adaptive control logic selecting the plurality of taps in a predetermined sequence over the plurality of cycles including selecting a next tap during a next cycle;
• the adaptive control logic determining whether the output MSE value is less than a best MSE value following adjustment of the set of control signals controlling a selected tap during one of the plurality of cycles;
• the adaptive control logic setting the best MSE value to the output MSE value and adjusting a gain control signal controlling the selected tap during a cycle if the adaptive control logic determines that the output MSE value is less than the best MSE value;
• and
• before selecting a next tap, if the adaptive control logic determines that the output MSE value is less than the best MSE value following adjustment of the set of control signals controlling a selected tap, then the adaptive control logic adjusting the dither control signal to a different dither value and determines whether the output MSE value in response to the different dither value is less than the best MSE value.

A computer program product for controlling a system comprising equalizer circuitry, a mean squared error (MSE) system, and adaptive control logic, the adaptive control logic comprising a processor, the computer program product comprising a computer-readable medium having stored thereon in computer-executable format instructions that when executed on the processor cause the processor to effect a method comprising:

• the equalizer circuitry outputting an equalized signal in response to an input signal, a plurality of gain control signals, and a plurality of dither control signals, the equalizer circuitry having a plurality of taps, each tap controlled by a set of control signals comprising one of the plurality of gain control signals and one of the plurality of dither control signals;
• the MSE system providing an output MSE value in response to the equalized signal during each of a plurality of cycles;
• the adaptive control logic adjusting the plurality of gain control signals and the plurality of dither control signals in response to an MSE value, the adaptive control logic selecting the plurality of taps in a predetermined sequence over the plurality of cycles including selecting a next tap during a next cycle;
• the adaptive control logic determining whether the output MSE value is less than a best MSE value following adjustment of the set of control signals controlling a selected tap during one of the plurality of cycles;
• the adaptive control logic setting the best MSE value to the output MSE value and adjusting a gain control signal controlling the selected tap during a cycle if the adaptive control logic determines that the output MSE value is less than the best MSE value;
• and
• before selecting a next tap, if the adaptive control logic determines that the output MSE value is less than the best MSE value following adjustment of the set of control signals controlling a selected tap, then the adaptive control logic adjusting the dither control signal to a different dither value and determines whether the output MSE value in response to the different dither value is less than the best MSE value.