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US 2015/0042394 A1Published application
Buffer circuit
AssigneeSK hynix Inc.
InventorTae-Jin HWANG
Life of this patent
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Abstract
A buffer circuit includes a buffering unit suitable for buffering an input signal and outputting an output signal and a feedback control unit suitable for adjusting a slew rate of the input signal in response to the output signal.
Claims18
A buffer circuit comprising:
- a buffering unit suitable for buffering an input signal;
- and
- a feedback control unit suitable for adjusting a slew rate of the input signal by receiving an output signal fed back from the buffering unit.
A buffer circuit comprising:
- a differential amplifying unit suitable for amplifying differential input signals, and outputting an amplification output signal;
- a differential control signal generating unit suitable for outputting differential control signals in response to the amplification output signal;
- and
- a feedback control unit suitable for adjusting slew rates of the differential input signals in response to the differential control signals, respectively.
1 more element
A buffer circuit comprising:
- a buffering unit suitable for receiving an input signal through an input terminal and transmitting an output signal by buffering the input signal;
- a control signal generating unit suitable for generating a control signal in response to the output signal;
- a feedback control unit suitable for adjusting a capacitance of the input terminal in response to the control signal.
Dependencies are inferred from the claim text.