Numerical area recovery

A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method for performing area recovery on a circuit design, the method comprising:

• selecting a gate for area recovery, wherein an output of a driver gate is electrically coupled to an input of the gate;
• determining a maximum delay value from an input pin of the driver gate to an output pin of the gate that does not create new timing requirement violations or worsen existing timing requirement violations at any of the timing endpoints of the circuit design;
• and
• downsizing the gate based on the maximum delay value, wherein said downsizing comprises inputting the maximum delay value in a closed-form expression.

An apparatus, comprising:

• a processor;
• and
• a non-transitory computer-readable storage medium storing instructions that, when executed by the processor, cause the apparatus to perform a method for performing area recovery on a circuit design, the method comprising:
• selecting a gate for area recovery, wherein an output of a driver gate is electrically coupled to an input of the gate;
• determining a maximum delay value from an input pin of the driver gate to an output pin of the gate that does not create new timing requirement violations or worsen existing timing requirement violations at any of the timing endpoints of the circuit design;
• and
• downsizing the gate based on the maximum delay value, wherein said downsizing comprises inputting the maximum delay value in a closed-form expression.