Method and Apparatus for Integrated Circuit Mask Patterning
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChin-Min Huang, Bo-Han Chen, Lun-Wen Yeh, Shun-Shing Yang, Chia-Cheng Chang, Chern-Shyan Tsay, Chien Wen Lai, Hua-Tai Lin
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Abstract
Provided is an integrated circuit (IC) design method. The method includes receiving a design layout of the IC, the design layout having a first main feature, and adding a negative assist feature to the design layout, wherein the negative assist feature has a first width, the negative assist feature divides the first main feature into a second main feature and a third main feature by the first width, and the first width is sub-resolution in a photolithography process.
Claims20
1-9. (canceled)
A method, comprising:
- receiving a design layout of an integrated circuit (IC), the design layout having a first main feature and a second main feature;
- and
- adding an assist feature to the design layout, wherein:
- the assist feature has a first length and a first width;
- the assist feature connects the first main feature and the second main feature by the first length;
- and
- the first width is sub-resolution in a photolithography process:
- and
- performing an optical proximity correction (OPC) process to the first and second main features to optimize the design layout;
- and
- performing a mask rule checking (MRC) process to the optimized design layout, after performing the OPC process.
(canceled)
An integrated circuit (IC) photo mask, comprising:
- a first main feature of the IC;
- a second main feature of the IC;
- and
- an assist feature connecting the first and the second main features, the assist feature being orthogonal to at least one of the first and the second main features;
- and
- wherein the assist feature is a sub-resolution correction feature for correcting for optical proximity effect.
21-29. (canceled)
A method, comprising:
- receiving a design layout of an integrated circuit (IC), the design layout having a first main feature and a second main feature;
- and
- adding an assist feature to the design layout, wherein:
- the assist feature has a first length and a first width;
- the assist feature connects the first main feature and the second main feature by the first length, the assist feature being orthogonal at least one of the first and the second main features;
- and
- the first width is sub-resolution in a photolithography process;
- and
- performing an optical proximity correction (OPC) process to the first and second main features to optimize the design layout;
- and
- performing a mask rule checking (MRC) process to the optimized design layout, after performing the OPC process.
Dependencies are inferred from the claim text.