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US 2015/0039864 A1Published application
Systems and methods for defeating malware with randomized opcode values
AssigneeeBay Inc.
InventorJohn Patrick Edgar Tobin
Life of this patent
Estimating the term…
Abstract
A computer processor includes a first instruction set and a second instruction set. The computer processor further includes a translator. The translator translates the first instruction set into the second instruction set. The computer processor is configured to execute operations using only the second complete instruction set.
Claims20
A computer processor comprising:
- a first complete instruction set;
- and
- a translator to translate the first complete instruction set into a second complete instruction set, the computer processor configured to execute operations using only the second complete instruction set.
A process comprising:
- maintaining a first complete instruction set in a computer processor;
- translating the first complete instruction set into a second complete instruction set;
- and
- executing a process on the computer processor using only the second complete instruction set.
1 more element
A computer readable storage device comprising instructions that when executed by a processor execute a process comprising:
- maintaining a first complete instruction set in a computer processor;
- translating the first complete instruction set into a second complete instruction set;
- and
- executing a process on the computer processor using only the second complete instruction set.
1 more element
Dependencies are inferred from the claim text.