Systems and methods for single cell product path delay analysis
AssigneeInternational Business Machines Corporation
InventorsJeanne P. BICKFORD, Peter A. HABITZ, Vikram IYENGAR, Brian A. WORTH, Jinjun XIONG
Life of this patent
Estimating the term…
Abstract
Methods and systems for qualifying a single cell with product path delay analysis are provided. A method includes designing a product using a model from an initial test site. The method also includes creating performance path tests for one or more paths on the product. The method further includes measuring performance path parameters of the product. The method includes determining that the measured performance path parameters match predicted performance path parameters.
Claims14
A method, comprising:
- establishing a path selection to test;
- determining a process corner for each chip;
- measuring at least one of a path delay and a frequency of each chip;
- comparing data sensitivities based on a regression analysis with timing sensitivities;
- and
- adjusting a timing margin setting based on the comparison of the data sensitivities and the timing sensitivities.
A computer system for qualifying a performance path, the system comprising:
- a CPU, a computer readable memory and a computer readable storage media;
- first program instructions to create performance path tests for one or more paths on a product;
- second program instructions to measure performance path parameters of the product;
- third program instructions to determine that the measured performance path parameters match predicted performance path parameters;
- and
- fourth program instructions to adjust a timing margin setting when the measured performance path parameters do not match the predicted performance path parameters,
- wherein the first, second, third, and fourth program instructions are stored on the computer readable storage media for execution by the CPU via the computer readable memory.
A computer system for qualifying a performance path, the system comprising:
- a CPU, a computer readable memory and a computer readable storage media;
- first program instructions to establish a path selection to test;
- first program instructions to determine a process corner for each chip;
- first program instructions to measure at least one of a path delay and a frequency of each chip;
- first program instructions to compare data sensitivities based on a regression analysis with timing sensitivities;
- and
- first program instructions to adjust a timing margin setting based on the comparison of the data sensitivities and the timing sensitivities.
Dependencies are inferred from the claim text.