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US 2015/0033093 A1Published application
Advance clocking scheme for ecc in storage
AssigneeSK hynix memory solutions inc.
InventorsKwok W. Yeung, Kin Man Ng, Kin Ming Chan
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Abstract
A system for clocking a decoder is disclosed. The system includes: a channel front end configured to receive input data, a first clock configured to provide a first clock signal as input to the channel front end, a decoder configured to receive intermediate data associated with the output of the channel front end, and a second clock configured to provide a second clock signal as input to the decoder. In some embodiments, the second clock signal is not derived from the first clock signal.
Claims20
A system for clocking a decoder, comprising:
- a channel front end configured to receive input data and transform the received input data to an output of the channel front end;
- a first clock configured to provide a first clock signal as input to the channel front end;
- a decoder configured to receive intermediate data associated with the output of the channel front end;
- and
- a second clock configured to provide a second clock signal as input to the decoder, wherein the second clock signal is not derived from the first clock signal.
2 more elements
A method of clocking a decoder, comprising:
- receiving input data at a channel front end;
- transforming the received input data to an output of the channel front end;
- processing the input data through the channel front end using a first clock signal from a first clock;
- and
- processing, through a decoder, intermediate data associated with the output of the channel front end, wherein processing is performed using a second clock signal from a second clock, wherein the second clock signal is not derived from the first clock signal.
2 more elements
Dependencies are inferred from the claim text.