Robust hardware/software error recovery system
AssigneeQUALCOMM Incorporated
InventorsAssaf Shacham, Itai Lanel, Maya Haim (Erez)
Life of this patent
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Abstract
A method for error detection and recovery is provided in which a host controller and host software collaborate together. The host controller may: detect an error condition, set an error interrupt or register, and/or halt task execution or processing at the host controller. The host software may: detect an error condition as a result of the host controller having set the error interrupt or register; performs error handling, and clears the error condition. The host controller then resumes execution or processing of tasks upon detecting that error condition has been cleared by the host software.
Claims26
A host controller, comprising:
- an interface to access one or more registers;
- a processing circuit coupled to the interface and adapted to
- set an error register upon detection of an error condition in the processing of tasks;
- halt task execution or processing of tasks;
- resume execution or processing of tasks upon detection that the error condition has been cleared.
A method operational at a host controller, comprising:
- setting an error register upon detection of an error condition in the processing of tasks;
- halting task execution or processing of tasks;
- resuming execution or processing of tasks upon detection that the error condition has been cleared.
A non-transitory processor-readable storage medium having one or more instructions which, when executed by at least one processing circuit, cause the at least one processing circuit to:
- set an error register upon detection of an error condition in the processing of tasks;
- halt task execution or processing of tasks;
- resume execution or processing of tasks upon detection that the error condition has been cleared.
A host device, comprising:
- one or more registers;
- a host controller;
- a processing circuit coupled to the host controller and the one or more registers and executing a host software, wherein the host software is adapted to perform error handling on the host controller by
- polling an error register to ascertain whether an error has been set by the host controller;
- performing error handling upon detection that the error register has been set;
- and
- clearing the error register upon completion of error handling.
A method performed by software on a host device, comprising:
- polling an error register to ascertain whether an error has been set by a host controller;
- performing error handling upon detection that the error register has been set;
- and
- clearing the error register upon completion of error handling.
A host device, comprising:
- a processing circuit executing a host software;
- a host controller coupled to the processing circuit, wherein the host controller and host software are adapted to:
- detecting an error condition at the host controller;
- setting an error interrupt or register by the host controller;
- halting task execution or processing by the host controller;
- detecting an error condition at the host software as a result of the host controller having set the error interrupt or register;
- performing error handling by at least one of the host software and host controller;
- clearing the error condition by the host software;
- and
- resuming execution or processing of tasks at the host controller upon detecting that error condition has been cleared by the host software.
A method operational on a host device, comprising:
- detecting an error condition at a host controller;
- setting an error interrupt or register by the host controller;
- halting task execution or processing by the host controller;
- detecting an error condition at a host software as a result of the host controller having set the error interrupt or register;
- performing error handling by at least one of the host software and host controller;
- clearing the error condition by the host software;
- and
- resuming execution or processing of tasks at the host controller upon detecting that error condition has been cleared by the host software.
Dependencies are inferred from the claim text.