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US 2015/0033000 A1Published application
Parallel Processing Array of Arithmetic Unit having a Barrier Instruction
AssigneePact Xpp Technologies AG
InventorsMartin Vorbach, Volker Baumgarte, Gerd Ehlers, Frank May, Armin Nuckel
Life of this patent
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Abstract
A parallel processing array processor has a plurality of arithmetic units and a unit that manages barrier instructions whereby processing of program sequences may be coordinated. The array processor further comprises a hierarchy of assigned units whereby multiple program sequences may be processed in parallel.
Claims10
Apparatus, comprising:
- a plurality of arithmetic processors arranged in a plurality of dimensions,
- at least one memory;
- a first assigned unit;
- and
- an interconnect bus system;
- wherein
- the assigned unit loads program sequences into said at least one memory for execution by said plurality of arithmetic processors;
- wherein a sequence may include a barrier instruction;
- and wherein
- the assigned unit determines, in response to a barrier instruction, whether all instructions preceding the respective barrier have been successfully scheduled for execution and, in response to the determination, whether to continue to cause the scheduling of execution of instructions in the sequence beyond the barrier or to wait until all instructions before the barrier have been scheduled to execute.
7 more elements
Apparatus, comprising:
- a plurality of assigned units arranged in a hierarchy;
- for each assigned unit at the lowest hierarchal level,
- a plurality of arithmetic processors arranged in a plurality of dimensions,
- at least one memory;
- and
- an interconnect bus system;
- wherein each of the lowest hierarchal level assigned units
- the issues instructions from a program sequence to said a plurality of arithmetic processors for execution;
- and
- wherein assigned units at a higher hierarchal level assigns program sequences to the assigned units at a lower hierarchal level for parallel execution with program sequences assigned to other lowest hierarchal level assigned units.
7 more elements
Dependencies are inferred from the claim text.