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US 2015/0032945 A1Published application
Method for flash compressed instruction caching for limited ram/flash device architectures
AssigneeThomson Licensing
InventorStefano Marconcini
Life of this patent
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Abstract
Compression and the caching of decompressed code in RAM is described by using an uncompressed paged instruction caching fault method to keep all of code compressed in a FLASH memory. The method only decompresses and caches in DRAM memory the portion of code that is miming at a certain instance in time (i.e., DRAM window), which maintains a pre-fetched portion of code based on static windowing FLASH.
Claims16
A method for memory management in a device, the method comprising the steps of:
- caching uncompressed code from a FLASH memory in the device to a Dynamic Random Access Memory (DRAM) in the device (12);
- maintaining compressed code in said FLASH (14);
- and
- caching said uncompressed code in DRAM during a period of time while starting up said device (14).
1 more element
An apparatus having memory management features, the apparatus comprising:
- a processor (402);
- a FLASH memory (406) coupled with the processor;
- and
- a DRAM memory (404) coupled with the processor,
- wherein the processor is configured to can needed uncompressed code from the FLASH memory to the DRAM memory during a predetermined time window and to otherwise maintain compressed code in the FLASH memory.
2 more elements
An apparatus having memory management capability, the apparatus comprising:
- means for caching uncompressed code from a FLASH memory in the device to a DRAM in the device;
- means for maintaining code compressed in FLASH;
- and
- means for caching decompressed code in DRAM during a predetermined window of time during start up of the device.
1 more element
Dependencies are inferred from the claim text.