Synchronous Bus Width Adaptation
AssigneeBroadcom Corporation
InventorsDavid Alan Baer, Brian Schoner, Jin-Chin Wang
Life of this patent
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Abstract
A system includes a first processing component, a second processing component, and an adapted bus linking the first and second processing components. The adapted bus may account for a circuit characteristic or on-chip variation in the system. For example, the bus may be adapted to include a wider data width because of an effect of the on-chip variation that limits performance of the bus at a lower data width. The bus may include a widened data width for a portion of the bus. In that regard, the bus may include a bus expander and a bus narrower for adjusting the data width of the bus.
Claims20
A circuit comprising:
- a first processing component;
- a second processing component;
- and
- a bus between the first and second processing components, the bus comprising:
- a bus adaptation that modifies the bus to account for a circuit characteristic between the first processing component and the second processing component.
A system comprising:
- a memory storing an adaption parameter;
- and
- system logic in communication with the memory, the system logic configured to:
- obtain a circuit layout that includes a first processing component and a second processing component;
- determine, from the circuit layout, a circuit characteristic between the first and second processing components;
- and
- determine a bus adaptation to a bus between the first and second processing components based on the circuit characteristic.
A method comprising:
- in a design system:
- identifying a bus in a circuit layout;
- identifying an on-chip variation in the circuit layout that affects the performance of the bus in the circuit layout;
- and
- adapting the bus in the circuit layout to account for the on-chip variation.
Dependencies are inferred from the claim text.