Method of manufacturing semiconductor device

A method of manufacturing a semiconductor device comprising the steps of:

• (a) providing a wiring substrate including an upper surface, a lower surface opposite to the upper surface, a first device region provided on the lower surface, a second device region provided on the lower surface and provided next to the first device region, a dicing region provided between the first device region and the second device region, a peripheral part provided on the lower surface and provided around the first device region, the second device region and the dicing region, a target mark provided in the peripheral part and not provided on an extension line of the dicing region, a plurality of first bump lands provided in a matrix shape in the first device region, a plurality of second bump lands provided in a matrix shape in the second device region, and an insulating film formed over the lower surface such that the first bump lands and the second bump lands are exposed;
• wherein:
• the first bump lands have a first outermost peripheral bump land row that is disposed in an outermost peripheral row among the first bump lands and is nearest to the dicing region,
• the second bump lands have a second outermost peripheral bump land row that is disposed in an outermost peripheral row among the second bump lands and is nearest to the dicing region, and
• the target mark is provided, in plan view, between the extension line of the dicing region and each of extension lines of the first outermost peripheral bump land row and the second outermost peripheral bump land row,
• (b) after the step (a), mounting each of a first semiconductor chip and a second semiconductor chip on the upper surface of the wiring substrate;
• (c) after the step (b), sealing the first semiconductor chip and the second semiconductor chip with resin;
• (d) after the step (c), forming a plurality of first external terminals and a plurality of second external terminals, respectively, on the first bump lands and the second bump lands;
• and
• (e) after the step (d), specifying the dicing region on the basis of the target mark, and cutting the wiring substrate along the dicing region, wherein
• in the step (e), the wiring substrate is cut using a dicing blade.