Single-Ended Low-Swing Power-Savings Mechanism with Process Compensation

A memory comprising:

• a set of memory cells;
• and
• a single-ended low-swing power-savings mechanism coupled to the set of memory cells, wherein the single-ended low-swing power-savings mechanism comprises:
• a precharge device coupled to a first biasing device, wherein the precharge device turns off in an evaluation phase and wherein the first biasing device is always on;
• a second biasing device coupled to a keeper device, wherein, responsive to an input of the second biasing device being at a first voltage level, a strength of the keeper device is changed to a first level, and wherein, responsive to the input of the second biasing device being at a second voltage level, the strength of the keeper device is changed to a second level;
• a first node coupled to the precharge device, the biasing device, the keeper device, and an input of an inverting amplifier, wherein, responsive to receiving a precharged voltage level read data line signal, a precharged voltage level of the first node falls faster when the keeper device is weakened to a first level;
• and
• the keeper device coupled to an output of the inverting amplifier and a global bit line, wherein the keeper device turns on in response to receiving a LOW signal from the inverting amplifier and pulls up the voltage at the first node so that a HIGH signal is output onto a global data line.