Semiconductor device
AssigneeRenesas Electronics Corporation
InventorsMasaaki Iijima, Mitsuhiro Deguchi
Life of this patent
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Abstract
An interface circuit provided in a semiconductor device supplies an operation clock to an external memory device based on a clock signal and receives a data signal and a strobe signal from the external memory device. The interface circuit includes a delay circuit delaying the received strobe signal. The delay circuit includes a first adjustment circuit and a second adjustment circuit connected in series with the first adjustment circuit. The first adjustment circuit is capable of adjusting a delay amount of the strobe signal in a plurality of steps in accordance with the set frequency of the clock signal. The second adjustment circuit is capable of adjusting the delay amount of the strobe signal with a higher precision than the first adjustment circuit.
Claims7
A semiconductor device comprising:
- a clock generator generating a clock signal having a set frequency;
- and
- an interface circuit supplying an operation clock to an external memory device based on said clock signal and receiving a data signal and a strobe signal from said memory device,
- said interface circuit including:
- a delay circuit delaying said received strobe signal;
- and
- a data detection circuit sampling said data signal at a timing of an edge of said strobe signal having been delayed by said delay circuit, and
- said delay circuit including:
- a first adjustment circuit capable of adjusting a delay amount of said strobe signal in a plurality of steps in accordance with the set frequency of said clock signal;
- and
- a second adjustment circuit connected in series with said first adjustment circuit and capable of adjusting the delay amount of said strobe signal with a higher precision than said first adjustment circuit.
Dependencies are inferred from the claim text.