Thin film transistor substrate, method for fabricating the same, and display device including the same

A method for fabricating a thin film transistor, the method comprising:

• forming a semiconductor layer on a substrate;
• forming a preliminary gate insulating film on the semiconductor layer;
• forming a gate electrode on the preliminary gate insulating film;
• forming a preliminary interlayer insulating film on the gate electrode;
• respectively converting the preliminary gate insulating film and the preliminary interlayer insulating film into a gate insulating film and an interlayer insulating film, by forming a source contact hole and a drain contact hole for exposing portions of the semiconductor layer and by forming a first convex portion at an inlet of the source contact hole and at an inlet of the drain contact hole through discharging a first etching solution onto the preliminary interlayer insulating film;
• and
• respectively forming a source electrode and a drain electrode in the source contact hole and the drain contact hole.

A display device, comprising:

• a thin film transistor substrate, including:
• a substrate;
• a semiconductor layer formed on the substrate;
• a gate insulating film formed on the semiconductor layer;
• a gate electrode formed on the gate insulating film;
• an interlayer insulating film formed on the gate electrode and having a source contact hole and a drain contact hole for exposing portions of the semiconductor layer;
• a source electrode and a drain electrode respectively inserted into the source contact hole and the drain contact hole;
• a planarization layer formed on the source electrode and the drain electrode and having a pixel contact hole for exposing a portion of the drain electrode;
• and
• a pixel electrode inserted into the pixel contact hole;
• a common electrode facing the pixel electrode;
• and
• an organic light emitting layer or a liquid crystal layer formed between the pixel electrode and the common electrode,
• the interlayer insulating film and the planarization layer including convex portions formed at an inlet of the source contact hole, an inlet of the drain contact hole, and an inlet of the pixel contact hole.