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US 2015/0029370 A1Published application
Solid-state imaging device
AssigneeKabushiki Kaisha Toshiba
InventorsTakahiko MIHARA, Yukiyasu Tatsuzawa
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Abstract
According to one embodiment, in a pixel array section, pixels that accumulate photoelectrically-converted charges are arranged in a matrix shape. An exposure-period control section controls an exposure period of the pixels for each of fields and controls readout timing such that interlace readout is performed from the pixel array section. A charge-discharging control section performs discharge control for charges accumulated in the pixels in a non-exposure period of the pixels.
Claims20
A solid-state imaging device comprising:
- a pixel array section in which pixels that accumulate photoelectrically-converted charges are arranged in a matrix shape;
- an exposure-period control section configured to control an exposure period of the pixels for each of fields and control readout timing such that interlace readout can be performed from the pixel array section;
- and
- a charge-discharging control section configured to perform discharge control for charges accumulated in the pixels in a non-exposure period of the pixels.
1 more element
A solid-state imaging device comprising:
- a pixel array section in which pixels that accumulate photoelectrically-converted charges are arranged in a matrix shape;
- a vertical scanning circuit configured to scan a readout target pixel in a vertical direction;
- a load circuit configured to perform a source follower operation between the load circuit and the pixel to thereby read out a signal from the pixel to a vertical signal line for each of columns;
- a column ADC circuit configured to detect signal components of the pixels in a CDS for each of the columns;
- a horizontal scanning circuit configured to scan the readout target pixel in a horizontal direction;
- an exposure-period control section configured to control an exposure period of the pixels for each of fields and control readout timing such that interlace readout can be performed from the pixel array section;
- and
- a charge-discharging control section configured to perform discharge control for charges accumulated in the pixels in a non-exposure period of the pixels, wherein
- the exposure-period control section includes:
- a readout-timing control section configured to control the readout timing such that the interlace readout is performed from the pixel array section;
- an odd-number-field-reset-timing control section configured to control reset timing for charges accumulated in the pixels in an odd number field;
- and
- an even-number-field-reset-timing control section configured to control reset timing for charges accumulated in the pixels in an even number field.
10 more elements
Dependencies are inferred from the claim text.