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US 2015/0028839 A1Published application
High efficiency switched capacitor voltage regulator
AssigneeEntropic Communications, Inc.
InventorsBranislav Petrovic, Joseph Nabicht
Life of this patent
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Abstract
A high efficiency switched capacitor voltage regulator circuit and a method of efficiently generating an enhanced voltage from an input voltage supply. An input voltage Vin from a main power source is the base voltage to be pumped to an enhanced voltage. Auxiliary voltage sources V1 and V2 are from sources (or grounds) available in the system. During phase 1 of a clock signal, a pump capacitor is charged to ΔV=V2−V1. During phase 2 of the clock signal, the pump capacitor is connected in series between Vin and an output capacitor, resulting in the sum voltage V=Vin+ΔV being generated across the output capacitor.
Claims17
A switched capacitor voltage regulator circuit, including:
- (a) a pump capacitor having a first node and a second node;
- (b) at least one output capacitor;
- (c) a first switch coupled between an input voltage Vin and the first node of the pump capacitor;
- (d) a second switch coupled between a first auxiliary voltage source and the first node of the pump capacitor;
- (e) at least one third switch between the second node of the pump capacitor and at least one corresponding output capacitor;
- (f) a fourth switch coupled between a second auxiliary voltage source and the second node of the pump capacitor;
- and
- (g) a clock source, electrically coupled to each of the first, second, third, and fourth switches, for generating a first clock phase and a second clock phase;
- wherein during the first clock phase, the first and third switches are open, and the second and fourth switches are closed, thereby charging the pump capacitor to a voltage ΔV equal approximately to the second auxiliary voltage minus the first auxiliary voltage;
- and
- wherein during a second clock phase, the first and third switches are closed, and the second and fourth switches are open, thereby coupling the input voltage Vin to the pump capacitor and coupling the pump capacitor to at least one output capacitor, thereby charging at least one output capacitor to an output voltage Vout approximately equal to Vin+ΔV.
8 more elements
A method for generating an enhanced voltage, including:
- (a) coupling a voltage differential across a pump capacitor during a first clock phase, thereby charging the pump capacitor to a voltage ΔV;
- and
- (b) coupling a primary voltage Vin to the pump capacitor during a second clock phase and coupling the pump capacitor to at least one holding capacitor, thereby charging the at least one holding capacitor to an output voltage Vout approximately equal to Vin+ΔV.
A method for generating an enhanced voltage, including:
- (a) coupling a first switch between an input voltage Vin and a first node of a pump capacitor;
- (b) coupling a second switch between a first auxiliary voltage source and the first node of the pump capacitor;
- (c) coupling at least one third switch between a second node of the pump capacitor and at least one corresponding output capacitor;
- (d) coupling a fourth switch between a second auxiliary voltage source and the second node of the pump capacitor;
- (e) opening the first and third switches during a first clock phase, and closing the second and fourth switches during the first clock phase, thereby charging the pump capacitor to a voltage ΔV equal approximately to the second auxiliary voltage minus the first auxiliary voltage;
- and
- (f) closing the first and third switches during a second clock phase, and opening the second and fourth switches during the second clock phase, thereby coupling the input voltage Vin to the pump capacitor and coupling the pump capacitor to at least one output capacitor, thereby charging at least one output capacitor to an output voltage Vout approximately equal to Vin+ΔV.
4 more elements
A switched capacitor voltage regulator circuit for generating an enhanced voltage, including:
- (a) means for coupling a voltage differential across a pump capacitor during a first clock phase, thereby charging the pump capacitor to a voltage ΔV;
- and
- (b) means for coupling a primary voltage Vin to the pump capacitor during a second clock phase and coupling the pump capacitor to at least one holding capacitor, thereby charging the at least one holding capacitor to an output voltage Vout approximately equal to Vin+ΔV.
A switched capacitor voltage regulator circuit for generating an enhanced voltage, including:
- (a) means for coupling a first switch between an input voltage Vin and a first node of a pump capacitor;
- (b) means for coupling a second switch between a first auxiliary voltage source and the first node of the pump capacitor;
- (c) means for coupling at least one third switch between a second node of the pump capacitor and at least one corresponding output capacitor;
- (d) means for coupling a fourth switch between a second auxiliary voltage source and the second node of the pump capacitor;
- (e) means for opening the first and third switches during a first clock phase, and closing the second and fourth switches during the first clock phase, thereby charging the pump capacitor to a voltage ΔV equal approximately to the second auxiliary voltage minus the first auxiliary voltage;
- and
- (f) means for closing the first and third switches during a second clock phase, and opening the second and fourth switches during the second clock phase, thereby coupling the input voltage Vin to the pump capacitor and coupling the pump capacitor to at least one output capacitor, thereby charging at least one output capacitor to an output voltage Vout approximately equal to Vin+ΔV.
4 more elements
Dependencies are inferred from the claim text.